Tape-out checklist: what has to be true before a chip goes to the fab

Sign-off, block by block, from the tools

The first mistake in a tape-out review is accepting a status. A block is not at sign-off because its owner said so in a slide; it is at sign-off when the reports say so. For each block, the review should be able to open the evidence, not a summary of it.

What the evidence has to show, for every block:

• RTL frozen and under change control, with every change since freeze traced to an approved ECO.
• Functional coverage at its agreed target, with the trend flat because it closed, not because regressions stopped running.
• Timing closed at every corner, including the worst-case voltage and temperature corners that are run last and skipped most.
• Power, IR drop and electromigration within budget on the final netlist, not an earlier one.
• DFT complete: scan chains inserted, ATPG coverage at target, memory BIST in place, and the bring-up test plan written against the actual pinout.
• Physical verification clean: DRC, LVS and antenna, with every remaining violation on the waiver list below.
• Package and pinout frozen, and the substrate design signed off against them.

Waivers: named, owned and dated

Every tape-out carries open items. The difference between a clean tape-out and a re-spin is whether those items are known. A waiver is a decision to tape out with a specific risk, and it needs four things: what the risk is, who accepted it, what it would cost if it bites, and what will be done about it after tape-out.

A review that cannot list its waivers has not finished. A review that lists forty has a different problem: it is taping out early, and should say so.

The dates downstream of tape-out

Tape-out is not the end of the program; it is the point after which the program cannot change its mind. So the checklist has to look forward. The samples date depends on the foundry slot being booked and the mask order placed. Bring-up depends on firmware being ready on the day silicon arrives, on the test program being written, and on boards being built. Customer dates depend on all of it.

Each of those is a commitment with an owner, and each should be checked against the tape-out date before the gate, not discovered afterwards. The most common post-tape-out surprise is firmware that is still planned against a samples date that moved two months ago.

The go or no-go is a person's decision

With the evidence open, the decision is usually clear: tape out on the date with the waivers listed, or defer by a known number of days to close a known number of items. What the review needs is the trade-off stated plainly, not another status round.

This is how Tymeline runs the gate. It reads sign-off for every block from the tools, pages the owners of what is not closed with exactly what is missing, lines up the runs that would close each gap, and builds the readiness packet with the evidence attached before the review. The go or no-go stays with a named person; no AI Employee approves a tape-out gate.