Resources · Reference

Semiconductor program glossary: the terms a program lead needs

Tymeline · · 6 min read

In short

This glossary defines the terms used when running a silicon program, in plain language. It covers chip design milestones, verification and physical design, firmware and bring-up, equipment programs, and qualification and ramp.

Chip design milestones

  • RTL freeze: the point after which the design's logic is no longer changed without a formal change order.
  • Coverage closure: when verification has exercised the design to its agreed target.
  • Timing closure: when the physical design meets its timing requirements.
  • Tape-out: the release of the final design to the foundry for manufacture.
  • Samples: the first chips returned from the fab, sent to the team and to customers.
  • First-silicon success: the first chips working well enough to go to production without another tape-out.
  • Re-spin: a second tape-out to correct a design that did not work the first time.

Design and verification

  • RTL: register-transfer level, the code that describes a chip's logic.
  • Design verification (DV): checking that the design does what the specification says.
  • Regression: the full set of verification tests, run repeatedly as the design changes.
  • Physical design (PD): turning the logic into a layout that can be manufactured.
  • ECO: engineering change order, a change made after the design was meant to be stable.
  • DFT: design for test, the structures added so the manufactured chip can be tested.
  • IP: a pre-designed block, often licensed from a third-party vendor.
  • PVT: process, voltage and temperature, the conditions a design must work across.
  • Shuttle: a shared manufacturing run on which several designs are fabricated together.
  • Mask set: the set of photomasks used to manufacture a chip, a major cost of each tape-out.

Firmware and bring-up

  • Bring-up: getting first silicon running, with firmware, on the bench.
  • Emulation: running the design on hardware before silicon exists, so software can start early.
  • SDK: the software development kit a customer uses to build on the chip.
  • Post-silicon validation: testing the manufactured chip against its specification.

Equipment and tool programs

  • Alpha tool: the first internal build of a new equipment platform.
  • Beta tool: a tool installed at a customer's fab for evaluation.
  • Insertion window: the period in which a fab decides which tools it will use for a process node.
  • Tool of record: the tool a fab has qualified and committed to for a process step.
  • Long-lead part: a component with a long delivery time, often setting the schedule.

Qualification and ramp

  • Qualification (qual): demonstrating that a product or process meets the customer's reliability and performance criteria.
  • Reliability lot: a batch of parts put through stress testing as part of qualification.
  • OSAT: outsourced semiconductor assembly and test, a company that packages and tests chips.
  • Transfer: moving a product or process from one site or line to another.
  • Ramp: increasing production volume after qualification.
  • MES: manufacturing execution system, the factory's record of lots and operations.

Program terms

  • Program: one deliverable with one end date and one accountable owner.
  • Commitment: something promised, with an owner and a date.
  • Baseline: the agreed plan against which changes are measured.
  • Re-baseline: an approved change to the plan.
  • Authority envelope: the actions an AI may take on a program without asking a person.
  • Decision receipt: a signed record of one consequential action, with its reasoning and approver.

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